FLIP FLOP

RS-FLIP FLOP

The logic symbol of or R-S Flip Flop is drawn in figure. The RS

Image

FF has two inputs, labeled send R- The two outputs are lasted Q and Qbar (say “notQ” or “Qnot”). In flip flop the output are always opposite, or complementary. In other words, if output Q=1, the output Qbar=0, so on. The letters “R” and “S” at the input of the R-S flip-flop are often referred to as the set and reset inputs.

The truth table details the operation of the R-S flip flop. When S and R input are both 0, both outputs go to a logical 1. This is called a Prohibited State. For the flip flop and is not used. The second time of the truth table shows that. When inputs S is 0 and R is 1, the Q output is set of logical 1. This is called the Set Condition. The third line shows that when input R is o and S is 1, output Q is reset (cleared) to 0. This is called Reset Condition. Line 4 in the truth table shows both input (R and S) at 1. This is the Idle or at reset condition and leaves Q and Qbar. In their previous complementary status. This is called the Hold Condition.

Logical symbol in fig shows has invert bubbles at the R and S inputs. These invert bubbles indicate that Set and Reset inputs are activated by a logical.

The RS-Flip Flop is also called on “RS Latch or a Set-Reset” Flip Flop.

 

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